OJEE SERIES
Computer-science-information-technology

Computer Basics

2 previous year questions.

Volume: 2 Ques
Yield: Medium

High-Yield Trend

2
2025

Chapter Questions
2 MCQs

01
PYQ 2025
medium
computer-science-information-technology ID: ojee-202
Consider a processor that generates 32-bit virtual addresses. It uses a direct mapped cache whose size is 32 KByte and has 32 Byte blocks. What is the number of bits needed for cache addressing?
1
5
2
10
3
15
4
20
02
PYQ 2025
medium
computer-science-information-technology ID: ojee-202
What is the amount of ROM needed to implement a 4-bit multiplier?
1
1 Kbits
2
2 Kbits
3
4 Kbits
4
64 bits