Computer Memory

The address `FFFF` is given in hexadecimal (base 16). To find the size of the memory, we need to determine the total number of unique addresses.
The addresses range from `0000` to `FFFF`.
The total number of addresses is `FFFF` + 1.
Now, we convert this number to base 10 to find the total number of locations.

Since computer memory sizes are based on powers of 2, let's express this in base 2.
So there are total memory locations.
In computer terminology, 1K (kilobyte or kilolocations) = .
We can rewrite in terms of K: The memory size is 64K.

Step 1: Understand the size of one RAM chip.
Each chip has a size of 32K 1, meaning it has 32K words and each word is 1 byte. Thus, each chip has a capacity of 32K bytes.

Step 2: Calculate the number of chips needed.
We need to provide 256K bytes of memory. The number of chips required is:

Step 3: Conclusion.
Thus, 8 RAM chips are needed to provide 256K bytes, and the correct answer is (a) 8.

Step 1: We are given that each RAM chip has a capacity of 32K × 1, which means it can store 32K bits (32 × 1024 bits).
Step 2: We need to calculate how many such RAM chips are required to provide a total memory capacity of 256K.
- The total capacity required is 256K (or 256 × 1024 bits).
Step 3: To calculate the number of chips, divide the total memory by the capacity of one chip:
Thus, the correct number of RAM chips required is 64, as the total capacity needed is 256K.

Step 1: Total memory required = 64 KB = 64 × 1024 = 65536 bytes
Step 2: Each RAM chip has capacity = bytes
Step 3: Number of chips required =

Step 1: Understand role of cache memory.
Cache stores recently or frequently accessed instructions and data.
Step 2: Speed advantage.
Cache is faster than RAM and helps reduce average memory access time for the CPU.

We are given the following parameters:
Virtual address size = 32 bits
Page size = 4 KB = bytes
Number of entries in TLB = 128
The TLB is 4-way set associative.
Step 1: Calculate the number of bits for the offset.
The page size is 4 KB, so the offset will be 12 bits, because: Step 2: Calculate the number of bits for the TLB index.
The total number of entries in the TLB is 128, and it is 4-way set associative. The number of sets in the TLB is: Thus, the number of bits for the index is: Step 3: Calculate the number of bits for the TLB tag.
The total number of bits for the virtual address is 32. The total number of bits used by the offset and the index is bits. Therefore, the number of bits for the TLB tag is: Thus, the correct answer is:

Let's examine each statement:
- Statement P: DRAM requires refreshing because it uses capacitors to store bits, which is true because capacitors leak charge and need to be refreshed periodically.
- Statement Q: SRAM does not require refreshing because it uses flip-flops instead of capacitors, which is true as flip-flops retain their state until power is turned off.
- Statement R: DRAM is faster than SRAM because it needs less frequent access. This is false. SRAM is faster than DRAM because it does not require refreshing and can be accessed more quickly.
- Statement S: DRAM is more suitable for main memory than SRAM due to its density, which is true because DRAM is denser and cheaper than SRAM.
Thus, the correct answer is option (b).