Semiconductor

Understanding p-n Junction Diode Biasing

- A p-n junction diode allows current flow in one direction (forward bias) and blocks current in the opposite direction (reverse bias).
(i) Forward Biasing:
- The p-side (anode) is connected to the positive terminal of the battery, and the n-side (cathode) is connected to the negative terminal.
- This reduces the depletion region width, allowing current to flow.
Circuit Diagram for Forward Biasing:
I-V Characteristics in Forward Bias:
- The current increases exponentially after the threshold voltage (0.7V for silicon, 0.3V for germanium).
(ii) Reverse Biasing:
- The p-side is connected to the negative terminal, and the n-side is connected to the positive terminal.
- This increases the depletion region width, preventing current flow (except for a small leakage current).
Circuit Diagram for Reverse Biasing:
I-V Characteristics in Reverse Bias:
- A small leakage current flows until the breakdown voltage is reached.

To determine the correct answer, let's analyze both the assertion and the reason provided.

Assertion (A): "We cannot form a p-n junction diode by taking a slab of a p-type semiconductor and physically joining it to another slab of an n-type semiconductor."

This assertion is true. When a p-type and an n-type semiconductor are physically joined without a continuous lattice structure, it does not result in a functional p-n junction diode. This is because there will be a high concentration of defects and inconsistencies at the interface, preventing proper charge carrier movement and the establishment of a depletion region necessary for diode function.

Reason (R): "In a p-type semiconductor while in an n-type semiconductor ."

This reason is false. In a p-type semiconductor, the concentration of holes ( ) is much greater than the concentration of electrons ( ), i.e., . Conversely, in an n-type semiconductor, the concentration of electrons ( ) is much greater than the concentration of holes ( ), i.e., .

Given that the assertion is true while the reason provided is incorrectly stated, we conclude:

Correct Answer: Assertion (A) is true, but Reason (R) is false.

Solution: When a p-n junction diode is forward biased, the application of an external voltage reduces the potential barrier. Let's break down the effects:

1. Barrier Height: In a forward-biased condition, the external voltage applied across the diode reduces the electric field within the depletion region. This reduction in the electric field lowers the barrier height. Electrons and holes can more easily cross the junction, leading to increased current flow. Thus, the barrier height decreases.
2. Depletion Layer Width: The forward-bias condition reduces the width of the depletion region. The applied voltage provides energy that lessens the barrier to carrier movement. Consequently, more charge carriers are injected into the region, and the electric field is weakened, resulting in a decrease in depletion layer width.

Therefore, when a p-n junction diode is forward biased, the barrier height and the depletion layer width both decrease.

Number of Holes Created in P-type Silicon Due to Doping

Given:

• The average number of dopant atoms per silicon atoms
• The number density of silicon atoms in the specimen is atoms/m
• We need to calculate the number of holes created per cubic centimetre due to doping.

Solution:

Step 1: Number of dopant atoms per silicon atom

The ratio of dopant atoms to silicon atoms is given as:

Step 2: Number of dopant atoms per cubic metre of silicon

The number density of silicon atoms is atoms/m . The number of dopant atoms per cubic metre is:

Step 3: Number of holes created per cubic metre

Since each dopant atom creates one hole in the semiconductor, the number of holes created per cubic metre is equal to the number of dopant atoms:

Step 4: Convert the number of holes to per cubic centimetre

Since , the number of holes per cubic centimetre is:

Example of a Dopant in P-type Silicon:

One example of a dopant used in p-type silicon is **boron (B)**. Boron atoms have one fewer valence electron than silicon, creating a hole in the crystal lattice when substituted for a silicon atom.

Final Answer:

The number of holes created per cubic centimetre in the specimen due to doping is .

Part (a): Energy Band Diagram of an N-Type Semiconductor at

N-type semiconductors are doped with donor impurities (e.g., phosphorus in silicon), introducing donor levels just below the conduction band edge . At , electrons are thermally excited from to the conduction band, making electrons the majority carriers.

Step 1: Key Features

• Valence Band: Filled up to
• Conduction Band: Starts at , with band gap (e.g., 1.12 eV for silicon)
• Donor Level: is 0.01–0.05 eV below :
  (e.g., 0.045 eV for phosphorus in silicon)
• Fermi Level: lies between and , closer to
• Carriers: Electrons in the conduction band, few holes in the valence band

Step 2: Diagram Description

• Axes: Vertical energy axis (in eV)
• Valence Band: Shaded region up to , labeled
• Band Gap: Blank region of width
• Conduction Band: Unshaded region above , with light shading to indicate electrons
• Donor Level: Dashed line at , 0.01–0.05 eV below , label
• Fermi Level: Dashed line at , between and , closer to
• Carriers: Indicate electrons above , few holes below

Part (b): Energy Band Diagram of a P-Type Semiconductor at

P-type semiconductors are doped with acceptor impurities (e.g., boron in silicon), introducing acceptor levels just above the valence band edge . At , electrons from the valence band occupy , creating holes in the valence band.

Step 1: Key Features

• Valence Band: Up to , with holes
• Conduction Band: Starts at , with band gap
• Acceptor Level: is 0.01–0.05 eV above :
  (e.g., 0.045 eV for boron in silicon)
• Fermi Level: lies between and , closer to
• Carriers: Holes in the valence band, few electrons in the conduction band

Step 2: Diagram Description

• Axes: Vertical energy axis (in eV)
• Valence Band: Shaded region up to , with gaps indicating holes
• Band Gap: Blank region of width
• Conduction Band: Unshaded region above , with minimal electron shading
• Acceptor Level: Dashed line at , 0.01–0.05 eV above , label
• Fermi Level: Dashed line at , between and , closer to
• Carriers: Indicate holes below , few electrons above

In a p-n junction diode, understanding the effects of forward biasing is crucial. When a diode is forward biased, the following occurs:

• Barrier Height: The external voltage applied in forward biasing reduces the built-in potential barrier. This lowering of the barrier makes it easier for charge carriers to cross the junction.
• Depletion Layer Width: Forward biasing reduces the depletion layer width. As the potential barrier decreases, more charge carriers can move across the junction, thus narrowing the depletion region.

This makes the correct answer: The barrier height and the depletion layer width both decrease.